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Low Power Networks-on-Chip By Cristina Silvano

Low Power Networks-on-Chip by Cristina Silvano

Condition - New
$174.39
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Summary

In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities.

This book will be specially printed for your order, which means it may take a little longer to arrive (5 days). We do this to cut down on waste & to help protect our planet.

Low Power Networks-on-Chip Summary

Low Power Networks-on-Chip by Cristina Silvano

In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.

Table of Contents

Network-on-Chip Power Estimation.- Timing.- synchronous/asynchronous communication.- Network-on-Chip link design.- Topology exploration.- Network-on-Chip support for CMP/MPSoCs.- Network design for 3D stacked logic and memory.- Beyond the wired Network-on-Chip.

Additional information

NLS9781489994370
9781489994370
1489994378
Low Power Networks-on-Chip by Cristina Silvano
New
Paperback
Springer-Verlag New York Inc.
2014-11-20
287
N/A
Book picture is for illustrative purposes only, actual binding, cover or edition may vary.
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