
The Cache Coherence Problem in Shared-Memory Multiprocessors by Igor Tartalja
Almost all software solutions are developed through academic research and implemented only in prototype machines leaving the field of software techniques for maintaining the cache coherence widely open for future research and development. This book is a collection of all the representative approaches to software coherence maintenance including a number of related efforts in the performance evaluation field.The book presents a selection of 27 papers dealing with state-of-the-art software solutions for cache coherence maintenance in shared-memory multiprocessors. It begins with a set of four introductory readings that provides a brief overview of the cache coherence problem and introduces software solutions to the problem. The text defines and illustrates static and dynamic software schemes, techniques for modeling performance evaluation mechanisms, and performance evaluation studies.
The book is intended for the experienced reader in computer engineering but possibly a novice in the topic of cache coherence. It also provides an in-depth understanding of the problem as well as a comprehensive overview for multicomputer designers, computer architects, and compiler writers. In addition, it is a software coherence reference handbook for advanced undergraduate and typical graduate students in multiprocessing and multiprogramming areas.
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Digital Image Warping
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Communication and Computer Networks
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Distributed Shared Memory
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Scheduling and Load Balancing in Parallel and Distributed Systems
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Performance Modeling for Computer Architects
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SPICE
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DSP-Based Testing of Analog and Mixed-Signal Circuits
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Parallel Architectures for Artificial Neural Networks
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Scheduling Divisible Loads in Parallel and Distributed Systems
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Simulation Validation
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Reliable Distributed Computing with the Isis Toolkit
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Digital Design and Modeling with VHDL and Synthesis
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Digital Systems Design with VHDL and Synthesis
Igort Tartalja is currently with the Department of Computer Engineering, Schools of Electrical Engineering, University of Belgrade. He received the BSEE in 1984 and MSEE in 1989, both from the School of Electrical Engineering, University of Belgrade, Belgrade, Serbia, Yugoslavia. He is in the final phase of finishing his PhD thesis on dynamic software maintenance of cache coherence in shared-memory multiprocessors. From 1984 to 1989 he was with the Laboratory for Computer Engineering, Institute for Nuclear Sciences, Vinca, Serbia, Yugoslavia, working primarily on the development of a real-time computer for applications in biophysics and distributed operating system for a special-purpose multicomputer. His current research interests include multiprocessor and multicomputer architectures, heterogeneous processing, and system software support for shared-memory multiprocessors and distributed systems.
Veljko Milutinovic has been the Department of Computer Engineering, Schools of Electrical Engineering, University of Belgrade, Belgrade, Serbia Yugoslavia since 1990. From 1982 to 1990 he was on the faculty of the School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana. He has been active in the RISC field for the last decade and in technology-related research (32-bit GaAS RISC for RCA) and application-related research (multimedia-oriented RISC-based multiprocessors efforts of NCR). He has published 40 papers in IEEE journals and presented over 200 invited talks all over the world. He is a senior member of the IEEE.
Veljko Milutinovic has been the Department of Computer Engineering, Schools of Electrical Engineering, University of Belgrade, Belgrade, Serbia Yugoslavia since 1990. From 1982 to 1990 he was on the faculty of the School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana. He has been active in the RISC field for the last decade and in technology-related research (32-bit GaAS RISC for RCA) and application-related research (multimedia-oriented RISC-based multiprocessors efforts of NCR). He has published 40 papers in IEEE journals and presented over 200 invited talks all over the world. He is a senior member of the IEEE.
| SKU | Unavailable |
| ISBN 13 | 9780818670961 |
| ISBN 10 | 0818670967 |
| Title | The Cache Coherence Problem in Shared-Memory Multiprocessors |
| Author | Igor Tartalja |
| Series | Systems |
| Condition | Unavailable |
| Binding Type | Paperback |
| Publisher | IEEE Computer Society Press,U.S. |
| Year published | 1996-01-30 |
| Number of pages | 368 |
| Cover note | Book picture is for illustrative purposes only, actual binding, cover or edition may vary. |
| Note | Unavailable |












