Name: VHDL and AHDL Digital System Implementation By Frank Scarpino
SKU: 9780138570873
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VHDL and AHDL Digital System Implementation Summary

VHDL and AHDL Digital System Implementation by Frank Scarpino

The future of circuit and device design lies with Hardware Description Languages. This is an easy, hand-holding introduction to using HDLs for rapid design and prototyping. Learn all you need to know to start using HDLs in the digital design of circuits and devices. This book walks through all the basics, and presents extensive examples. All circuit/device designers who use, or are considering using, a Hardware Description Language (HDL).

I. THEORY AND APPLICATIONS IN ALTERA HARDWARE DESCRIPTION LANGUAGE. 1. An Introduction to Combinational Logic and Hardware Description Language (AHDL). Introduction. A Combinational Logic Theorem. DeMorgans Theorem. DeMorgans Theorem and HDL. Implementation of a One-Bit Full Adder. An HDL Solution for a One-Bit Full Adder. An Alternate HDL Solution for a One-Bit Full Adder. An HDL Four-Bit Ripple-Carry Adder. An Alternate Four-Bit HDL Full Adder. An HDL Adder/Subtractor. Two-Level Logic Functions. Retrospective. 2. D-Type Memory, Basic Applications, and HDL. Basics of D-Type, One-Bit Memories. Asynchronous Inputs. Building a Twisted Ring Counter with D-Memories. A Reliable Twisted-Ring Counter Using a Case Construction. A Reliable Twisted-Ring Counter with State Decoder. A High-Speed Two-Bit Twisted-Ring (Johnson) Counter. Maximum Clock Rate for a Two-Bit Johnson Counter. Building a J-K Flip-Flop from a D-Type Flip-Flop. Retrospective. Chapter 2 Exercises. 3. Elements of Control Logic. Looking Back: Control Logic for Twisted-Ring Counters. A Basic Form of Control Logic for D-Type Flip-Flops. A Loadable, Left-Right Shift Register. An Alternative Source File for a Load/Hold/L-R Circular Shift Register. Tri-State Control. A Tri-State Interface for Registers. Retrospective. Chapter 3 Exercises. 4. An Overview of Counting Methods. Introduction. Commentary on Twisted-Ring Counters. Natural Binary Counters. Classical Nonbinary Counters. A Duodecade Counter. Polynomial Counters. An Up-Down Counter Using Conditional Tables. A Ripple Counter. Gray-Code Counters. Retrospective. Chapter 4 Exercises. 5. A Simplified UART/PC COM Port Receiver. Introduction. UART Signal Definition. Creating the Correct Interface Voltage Range. Asynchronous Signal Detection. Sampling the Stream. Retrospective. Chapter 5 Exercises. 6. Application of 7400-Series Library Functions. Introduction. A 74176-Presentable Decade Counter. A 74181 Arithmetic Logic Unit (ALU) Macrofunction. A 74176 Counter/7445 Decoder Timing Generator. A 74276 Library Register Macrofunction. An Integrated Application of 7400-Series Circuits. Retrospective. Chapter 6 Exercises. 7. State Machines in AHDL. Introduction. The Moore Model of a State Machine. The Mealy Model of a State Machine. An FSM Monitor for a Maximal Length Sequence Generator. Retrospective. Chapter 7 Exercises. 8. Application of Parametric Modules. Introduction. An LPM Random Access Memory System. A Library Digital-Phase Detector. An LPM Four-Bit Multiplier. An NTSC Television-Signal Generator. Retrospective. Chapter 8 Exercises. II. INTRODUCTION TO APPLICATIONS IN VHSIC HARDWARE DESCRIPTION LANGUAGE. 9. An Introduction to VHDL. Introduction. A Short Historical Note. A Prospective Glance. An Initial VHDL Counter. A Simple VHDL D-Type Flip-Flop. A Negative-Edge Triggered Flip-Flop. A VHDL D-Type Flip-Flop with Synchronous Preset and Clear. A VHDL Flip-Flop with Active Low Asynchronous Preset and Clear. A One-Bit VHDL Full Adder. A Four-Bit VHDL Adder. Retrospective. Chapter 9 Exercises. 10. A Semi-Formal Introduction to VHDL. Introduction. Three Design Methods. A VHDL, Positive-Edge Detector. A Behavioral Twisted-Ring Counter Design. VHDL State Machines. VHDL and a Classic 74283 Adder Circuit. Retrospective. Chapter 10 Exercises. 11. Integer Types, User Types, Arrays, and Functions in Applications. Introduction. Logic Vectors, Integers, and Companion Counters. A Simple Integer Processor. A Simple Integer Processor with Function Calls. An Averaging Filter. A Binary Coefficient-Weight FIR Filter. Retrospective. Chapter 11 Exercises. 12. A Simplified VHDL UART/COM Port Receiver. Introduction. Receiver Architecture and Design. Receiver Simulation. Alternative Means of Instantiating the Input Data Register. Retrospective. Appendix 12A: An Alternate VHDL Receiver Source File. Chapter 12 Exercises. 13. VHDL and Digital Filter Design: An Introduction. Introduction. Sampling of Continuous Signals. Frequency Content of Ideal Switching Waveform. Frequency Content of the Sampled Signal. Infinite and Finite Impulse Response Systems. Finite Impulse Response Filters. A Simple FIR Filter Illustration. The Fourier-Series Method of FIR Design. Retrospective. Chapter 13 Exercises. Index.

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Sku

CIN0138570876G

ISBN 13

9780138570873

ISBN 10

0138570876

Title

VHDL and AHDL Digital System Implementation by Frank Scarpino

Author

Frank Scarpino

Condition

Used - Good

Binding type

Paperback

Publisher

Pearson Education (US)

Year published

1998-01-31

Number of pages

336

Prizes

N/A

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Book picture is for illustrative purposes only, actual binding, cover or edition may vary.

Note

This is a used book - there is no escaping the fact it has been read by someone else and it will show signs of wear and previous use. Overall we expect it to be in good condition, but if you are not entirely satisfied please get in touch with us

VHDL and AHDL Digital System Implementation Frank Scarpino

VHDL and AHDL Digital System Implementation by Frank Scarpino

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VHDL and AHDL Digital System Implementation Summary

VHDL and AHDL Digital System Implementation by Frank Scarpino

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