1. The General Purpose Machine. The General Purpose Machine. Some Definitions and Conventions. Views of the Computer. The User's View. The Machine/Assembly Language Programmer's View.
The Stored Program Concept. The Programmer's Model -- Instruction Set Architecture. Machine Instructions and Data Typing. Tools of the Trade. Why Assembly Language Programming?
The Computer Architect's View.
The Big Picture. Tools of the Trade.
The Computer System Logic Designer's View.
The Implementation Domain. Importance of the Implementation Domain. The Distinction Between Classical Logic Design and Computer Logic Design. The CPU -- A Close-Up View.
Historical Perspective.
Early Work. The Relay Computer: The 1930s. Generations.
Trends and Research. Approach of the Text. Chapter Summary.
2. Machines, Machine Languages, and Digital Logic. Classification of Computers and Their Instructions. Computer Instruction Sets.
Data Movement Instructions. ALU Instructions. Branch Instructions. 4- 3- 2- 1- and 0-Address and General Register. Machine Classes. Access Paths to Operands: Addressing Modes.
Informal Description of the Simple RISC Computer, SRC.
Register and Memory Structure. Instruction Formats. Accessing Memory: the Load and Store Instructions. Arithmetic and Logic Instructions. Branch Instructions. Miscellaneous Instructions.
Formal Description of SRC Using Register Transfer Notation, RTN.
An RTN Description of the Simple RISC Computer, SRC. Formal versus Informal Descriptions.
Describing Addressing Modes with RTN. Register Transfers and Logic Circuits: from Behavior to Hardware.
Logic Circuits to Implement Register Transfers. The Bus as Data Highway. Register Transfer Operations and Data Path.
Chapter Summary. References.
3. Some Real Machines. Machine Characteristics and Performance.
Economics Is the Driving Force. Upward Compatibility.
Machine Performance. RISC versus CISC.
CISC Designs. The Bridge from CISC to RISC. RISC Design Philosophy.
A CISC Microprocessor: the Motorola 68000.
CPU and Memory Architecture. Operand and Instruction Formats and Their Interpretation. The MC68000 Instruction Set. Program Examples and the MC68000 Assembler. Exception Processing. Input/Output In the MC68000.
A RISC Architecture: the SPARC.
SPARC Processor and Memory Architecture. Operand and Instruction Formats and Interpretation. The SPARC Instruction Set. The SPARC Assembler and Example Programs. Interrupts and Traps In SPARC. Pipelining In the SPARC MB86900. Advanced SPARC Implementations.
Summary. References.
4. Processor Design. The Design Process. A 1-Bus Microarchitecture for the SRC.
The Abstract and Concrete RTN for the SRC Add Instruction. The Concrete RTN for Some Typical SRC Instructions.
Data Path Implementation. Logic Design for the 1-Bus SRC.
Overview of the Design of the 1-Bus SRC. Gate-Level Design of SRC. The SRC 1-Bus Control Sequences. Review of the Design Process.
The Control Unit.
Clocking and Timing. The 1-Bus SRC Hardwired Control Unit.
2- And 3-Bus Processor Designs.
A 2-Bus SRC. A 3-Bus SRC.
The Machine Reset.
Possible Reset Operations. Adding an Initialization and Reset Capability to the SRC.
Machine Exceptions.
The Exception Process. Kinds of Exceptions. Exception Processing In the SRC. Further Complications.
Summary. References.
5. Processor Design-Advanced Topics. Pipelining.
Overview. Basic Assumptions In Pipeline Design. Design Technique. Designing the Pipelined Data Path. Propagating an Instruction Sequence Through the Pipeline. Pipeline Hazards.
Instruction-Level Parallelism.
Superscalar Architectures. VLIW Architectures.
Microprogramming.
General Approach. Example: a Microcoded 1-Bus SRC Design. Alternative Approaches to Microcoding .
Summary.
6. Computer Arithmetic and the Arithmetic Unit. Number Systems and Radix Conversion.
Digital Number Representation. Representing Negative Integer Numbers.
Fixed Point Arithmetic.
Fixed Point Addition and Subtraction. Multiplication Algorithms and Hardware. Digital Division.
Semi-Numeric Aspects of ALU Design.
Branching Conditions. ALU Logical, Shift, and Rotate Instructions.
Floating Point Arithmetic.
Floating Point Representations. Floating Point Addition and Subtraction. Floating Point Multiplication and Division.
Summary.
7. Memory System Design. Introduction: The Components of the Memory System.
Main Memory Size and Organization. Memory Performance Parameters. The Memory Hierarchy.
RAM Structure: The Logic Designer's Perspective.
Memory Cells and Cell Arrays. Advanced Topic: RAM Chip Costs; Matrix Decoders. Static RAM Cell Design. Static RAM Timing. Dynamic RAM. Read-Only and Read-Mostly Memory.
Memory Boards and Modules.
Arrays of Memory Chips. Increasing the Number of Words-Address Space Expansion. Advanced Topic: The Memory Module. Performance Tradeoffs In Memory System Design.
Two Level Memory Hierarchy.
General Properties of a Two Level Hierarchy.
The Cache. Virtual Memory.
Memory Management and Address Translation. Putting It All Together: TLB, Cache, Primary and Secondary Memory.
The Memory Subsystem In the Computer. Chapter Summary. References.
8. Input and Output. The I/O Subsystem. Programmed I/O.
Programmed I/O Hardware. Software for Programmed I/O.
I/O Interrupts.
Interrupt Hardware. Interrupt Handler Software. Interrupt Priority and Nested Interrupts.
Direct Memory Access (DMA). I/O Data Format Change and Error Control.
Reformatting Data: Parallel/Serial Conversion. Error Control Codes.
Chapter Summary.
9. Peripheral Devices. Magnetic Disk Drives.
Hard Disk Drive Organization. Disk Drive Static Properties. Disk Drive Dynamic Properties. Other Mass Storage Devices.
Display Devices.
Video Monitors. Video Display Terminals and Memory Mapped Video. Flat-Panel Displays.
Printers.
Printer Characteristics. Kinds of Printers.
Input Devices. Interfacing to the Analog World.
Digital to Analog Conversion. Analog to Digital Conversion. Accuracy and Errors In DACs and ADCs.
Summary. References.
10. Communications, Networking and the Internet. Computer to Computer Data Communications.
Network Structures and Communications Channels. Tasks, Roles, and Levels In the Communications System. Communication Layer Models.
Serial Data Communications Protocols.
The EIA RS-232 Protocol. Modems. ASCII Data Link Control.
Local Area Networks.
The Ethernet LAN.
The Internet.
The TCP/IP Protocol Suite. Packet Routing. IP Addresses. Subnets. Trends and Research: Internet Futures.
Chapter Summary. References.
Appendix A: Digital Logic Appendix Topics. Combinational Logic. Truth Tables. Logic Gates. Properties of Boolean Algebra. The Sum-of-Products Form, and Logic Diagrams. The Product-of-Sums Form. Positive versus Negative Logic. The Data Sheet. Digital Components. Reduction of Two-Level Expressions. Speed and Performance. Sequential Logic. J-K and T Flip-Flops. Design of Finite State Machines. Mealy versus Moore Machines. Registers. Counters.
Appendix B: RTN Description of SRC. Appendix C: Assembly and Assemblers. Index. 