VHDL for Logic Synthesis by Andrew Rushton

VHDL for Logic Synthesis by Andrew Rushton

This guide covers the VHSIC Hardware Description Language (VHDL) as it is used specifically for logic synthesis. The basics of logic and synthesis are described initially, after which more advanced techniques are developed. The text finishes with techniques for writing effective test benches.

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ISBN 13
Title	VHDL for Logic Synthesis
Author	Andrew Rushton
Condition	Unavailable
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