System Reduction for Nanoscale IC Design by Peter Benner

System Reduction for Nanoscale IC Design by Peter Benner

This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle.

The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.

Benner, MPI, GE; Grivet-T., POLITO, Quarteroni, Politec., Rozza, SISSA, IT; Schilders, TU Eind., NE; Silveira, INESC-ID, PT